Abstract

Thermocompression bonding for wafer-level hermetic packaging was demonstrated at the lowest temperature of 370 to 390 °C ever reported using Al films with thin Sn capping or insertions as bonding layer. For shrinking the chip size of MEMS (micro electro mechanical systems), a smaller size of wafer-level packaging and MEMS–ASIC (application specific integrated circuit) integration are of great importance. Metal-based bonding under the temperature of CMOS (complementary metal-oxide-semiconductor) backend process is a key technology, and Al is one of the best candidates for bonding metal in terms of CMOS compatibility. In this study, after the thermocompression bonding of two substrates, the shear fracture strength of dies was measured by a bonding tester, and the shear-fractured surfaces were observed by SEM (scanning electron microscope), EDX (energy dispersive X-ray spectrometry), and a surface profiler to clarify where the shear fracture took place. We confirmed two kinds of fracture mode. One mode is Si bulk fracture mode, where the die shear strength is 41.6 to 209 MPa, proportionally depending on the area of Si fracture. The other mode is bonding interface fracture mode, where the die shear strength is 32.8 to 97.4 MPa. Regardless of the fracture modes, the minimum die shear strength is practical for wafer-level MEMS packaging.

Highlights

  • The chip size of MEMS is continuously shrinking

  • To clarify the relationship between die shear fracture strength and fracture mechanism, we observed the surface of shear-fractured dies by an optical microscope, SEM, EDX, and a surface profiler

  • We have already reported the results of SEM and EDX observation of bonding interface cross section after slightly separated by tension stress for bonded die with Al bonding layer capped with thin Sn at 390◦C under 77.7 MPa pressure for 2h in Figure 6 of reference [6]

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Summary

Introduction

The chip size of MEMS (micro electro mechanical systems) is continuously shrinking. Such a dramatic size reduction has been achieved by advanced wafer-level packaging and MEMS–ASIC (application specific integrated circuit) integration, where metal-based bonding is a key technology, because it can employ much smaller sealing width than glass frit bonding [1]. Hermetic sealing is possible at allowable temperature of CMOS (complementary metal-oxide-semiconductor) backend process (

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