Comparative Analysis of Mixed CNTs and MWCNTs as VLSI Interconnects for Deep Sub-micron Technology Nodes

Abstract

This research paper presents a performance analysis of the mixed carbon nanotube (CNT) as an interconnect for very large-scale integration (VLSI) circuits at deep sub-micron (DSM) technology nodes. The mixed CNT interconnect is a combination of multiwall CNTs (MWCNTs) and single-walled CNTs (SWCNTs). Using hierarchical modeling, a multiconductor circuit model is proposed for the mixed CNT bundle at global-level interconnect lengths. Due to the insertion of SWCNTs in a MWCNT interconnect, the overall density of the conducting tubes in the proposed mixed CNT interconnect structure increases, thereby decreasing the overall resistance and inductance of the mixed CNTs. The performance of the proposed mixed CNT interconnect is estimated in terms of delay and power delay product (PDP) for different technology nodes (32 nm, 22 nm, and 16 nm) at different interconnect lengths. For comparative analysis, a similar analysis is performed using MWCNT bundle interconnects. The comparative results show that there is reduction in the overall propagation delay and PDP for the proposed mixed CNTs compared to MWCNTs as the interconnect material for DSM technology nodes at global-level interconnect lengths.