Compact 3D Thermal Model for VLSI and ULSI Interconnect Network Reliability Verification

Abstract

A compact 3D thermal model is developed for the quick and accurate thermal characterization of self-heating in Back-End-of-Line (BEoL) interconnect network for reliability assessment. The model offers a more accurate thermal tool compared to the currently used conservative 2D reduced models. Both 2D and 3D reduced models are developed and verified against numerical simulations of different configurations and further validated against thermoreflectance measurements of specially fabricated samples devices. The compact model ultimately provides quick thermal characterizations for vast ICT networks at a fraction of the analysis time and computational cost required for full numeric simulations, with improved accuracy that could reach 20 fold that of currently applied conservative reduced models. When integrated with electrical layout designs, the model would serve as a thermal check on VLSI and ULSI networks to identify thermally critical regions where overheating could lead to degradation and reliability issues.