CMOS Level Shifters for Low Power Applications using 45nm Technology

Abstract

This paper presents a comparison of three different CMOS voltage level shifters. CMOS level shifters simulations are carried out using CADENCE tool. Level shifters are designed and implemented using 45nm technology. Single supply and multi supply voltage level shifters are implemented in this paper. The level shifters are tested for the inputs 1V and 2V. Three level shifters are compared in terms of Total power dissipation, propagation delay. It is observed that single supply CMOS level shifter has low power dissipation compared to other two. The propagation delay of modified single supply level shifter has low propagation delay.