Abstract
A closed-form formula for a waveform of the RC interconnection line with practical boundary conditions is derived. Expressions are also derived for the voltage slope and transition time of the RC interconnection and for coupling capacitance and crosstalk voltage height, which can be used in VLSI designs. Using the expressions, the optimum linewidth that minimizes RC delay and the trend of RC delay in the scaled-down VLSIs are discussed.< <ETX xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">></ETX>
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