Choice of Adders for Multimedia Processing Applications: Comparison of Various Existing and a Novel 1-Bit Full Adder

Abstract

We propose a full adder (FA) circuit and compare its performance metrics with the performance metrics of 13 other 1-bit FA circuits reported till date. In comparison with all 13, 1-bit adder cell architectures, the proposed 1-bit adder cell architecture (labelled AL-31) is better by 10% in power delay product (PDP) over one of the 13 other cell architectures (labelled TGA), when used in a 32-bit ripple carry adder (RCA) benchmark circuit. But the TGA cell is having best PDP among all the 14, 1-bit cell architectures, when simulated standalone. To calculate the PDP parameter, the performance metrics under consideration are worst- case delay, and worst-case power. The work in this paper shows that the proposed 1-bit FA is a better choice for implementing long word adders. This study is based on Cadence's Spectre simulation using generic 90nm Process Design Kit (PDK). All the standalone 1-bit FA cells and their corresponding 32-bit RCA based benchmarking are done at a supply voltage VDD = 1.2V, with at least 2fF loading at their outputs. Keywords: Adder cell architecture, Ripple carry adder, Power dissipation, Propagation delay, Power delay product, Carry propagation, and Carry skip adder.