Abstract

We discuss the origin of an additional dip other than the charge neutrality point observedin the transfer characteristics of graphene-based field-effect transistors with aSi/SiO2 substrate used as the back-gate. The double dip is proved to arise from chargetransfer between the graphene and the metal electrodes, while charge storage at thegraphene/SiO2 interface can make it more evident. Considering a different Fermi energy from theneutrality point along the channel and partial charge pinning at the contacts, we propose amodel which explains all the features observed in the gate voltage loops. We finally showthat the double dip enhanced hysteresis in the transfer characteristics can be exploited torealize graphene-based memory devices.

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