Abstract
In this paper, a low‐voltage, high performance charge pump circuit, suitable for implementation in standard CMOS technologies is proposed. Its pumping operation is based on cascading several cross‐connected NMOS voltage doubler stages. For very low‐voltage applications (1.2 V, 0.9 V), where the performance of the NMOS transistors is limited due to body effect, two improved versions of the charge pump with cascaded voltage doublers (charge pump with CVD) are also proposed. The first utilises PMOS transistors (charge pump with CVD‐PMOS) in parallel to the cross‐connected NMOS transistors, while the second improves the pumping gain by boosting the clock amplitude (charge pump with CVD‐BCLK). Simulations at 50 MHz have shown that a five‐stages charge pump with CVD can achieve a 1.5–8.4 V voltage conversion. For the same stage number and frequency, an output voltage of 4 and 7.3 V can be generated from 0.9 V, by using the charge pump with CVD‐PMOS and the charge pump with CVD‐BCLK, respectively.
Highlights
Charge pump circuits are mostly used in applications where voltages higher than the nominal power supply voltage are needed
We propose a second version of the charge pump with CVD, using PMOS transistors in parallel with the crossconnected NMOS [9]
The highest value of the charge pump output voltage is limited by the gate oxide breakdown voltage (BVox) and the breakdown voltage between the n þ/psubstrate (BVnþ2s) (Fig. 7)
Summary
Charge pump circuits are mostly used in applications where voltages higher than the nominal power supply voltage are needed. The charge pump circuit reported by Dickson has been widely used, for generating high voltages [1,2]. In that way the charge transfer switches can be turned off completely when required, preventing the reverse charge flow They can be turned on more effectively by the high voltage generated in the stage. The proposed charge pump circuit with CVD can generate higher output voltage when compared with the Dickson charge pump using NMOS devices and the NCP-2, without employing any of the above mentioned complicated circuit techniques. For very low-voltage operation, two improved versions of the charge pump circuit with CVD are proposed, suitable for operation even under a power supply voltage of 0.9 V. The fourth section, the proposed charge pumps are compared with the Dickson and the NCP-2 charge pump
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