Charge Carrier Distribution in Low-Voltage Dual-Gate Organic Thin-Film Transistors

Rei Shiwaku,Hiroyuki Matsui,Shizuo Tokito,Yasunori Takeda,Masataka Tamura,Tomohide Murase

doi:10.3390/app8081341

Rei Shiwaku, Hiroyuki Matsui + Show 4 more

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https://doi.org/10.3390/app8081341

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Journal: Applied sciences	Publication Date: Aug 10, 2018
Citations: 12	License type: CC BY 4.0

Affiliation: Yamagata University, Mitsubishi Chemical (Japan)

Abstract

Dual-gate organic thin-film transistors (DGOTFTs), which exhibit better electrical properties, in terms of on-current and subthreshold slope than those of single-gate organic thin-film transistors (OTFTs) are promising devices for high-performance and robust organic electronics. Electrical behaviors of high-voltage (>10 V) DGOTFTs have been studied: however, the performance analysis in low-voltage DGOTFTs has not been reported because fabrication of low-voltage DGOTFTs is generally challenging. In this study, we successfully fabricated low-voltage (<5 V) DGOTFTs by employing thin parylene film as gate dielectrics and visualized the charge carrier distributions in low-voltage DGOTFTs by a simulation that is based on finite element method (FEM). The simulation results indicated that the dual-gate system produces a dual-channel and has excellent control of charge carrier density in the organic semiconducting layer, which leads to the better switching characteristics than the single-gate devices.

Highlights

Organic thin-film transistors (OTFTs) have been attracting attention in the field of flexible and printed electronics
SW) and channel/drain (RdW) were extracted from Figure 5a,b and plotted as a function of gate mobility for the TG, DG devices was higher than the BG devices
We successfully fabricated low-voltage BG, TG, DG organic transistors by TG, DG devices was higher than the BG devices

Summary

Introduction

Organic thin-film transistors (OTFTs) have been attracting attention in the field of flexible and printed electronics. Ink-jet printing provides for drop-on-demand fabrication from digital data and can directly pattern customizable elements on a substrate These features are ideal for large-are electronic applications, including a flexible sensor sheet [1] and radio frequency identification (RFID) tags [2]. Dual-gate (DG) architecture which has both bottom-gate (BG) and top-gate (TG) electrode is known as a way to get a higher current and a steeper subthreshold slope than those from single-gate architecture commonly employed [5,6]. This DG architecture enables control of threshold voltage (V TH ) of the OTFTs [7]. These features are significant for realizing high-performance and robust organic electronics [8,9,10,11,12,13,14,15]

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