Characterization of impact of process options in Germanium-On-Insulator (GeOI) high-k & metal gate pMOSFETs by low-frequency noise

Abstract

The impact of technological processes on Germanium-On-Insulator (GeOI) noise performance is studied. We present an experimental investigation of low-frequency noise (LFN) measurements carried out on (GeOI) PMOS transistors with different process splits. The front gate is composed of a SiO 2/HfO 2 stack with a TiN metal gate electrode. The result is an aggressively reduced equivalent oxide thickness (EOT) of 1.8 nm. The buried oxide is used as a back gate for experimental purposes. Front and back gate interfaces are characterized and the slow oxide trap densities are extracted. The obtained values are comprised between 5 × 10 17 and 8 × 10 18 cm −3eV −1. No correlation between front interface trap density and front interface mobility is observed. We underline a strong correlation between rear interface trap density and rear interface mobility degradation. The impact of Ge film thickness is equally studied. For thin films, the measured drain-current noise spectral density shows that LFN can be described by the carrier fluctuation model from weak to strong inversion. For thicker film devices, in weak inversion the LFN can be described by the mobility fluctuation model and in strong inversion the LFN is described by the carrier fluctuation model. The α H parameter for these devices is 1.2 × 10 −3. These results are significant for the future development of GeOI technologies.