Abstract
In this paper we present an experimental study of SOI UTBB n-MOSFETs at cryogenic temperatures. The device employs fully silicided source/drain with dopant segregation formed by “Implantation Into Silicide” (IIS) process. The impact of the back-gate (Vback) on the device performance is systematically investigated. The results demonstrate that Vback is essential to tune the threshold voltage Vth. And optimization of Vback values can improve the subthreshold swing (SS), Drain-Induced Barrier Lowering (DIBL), transconductance Gm and mobility at cryogenic temperatures, providing a potential to fulfill the ultra-low power requirement for quantum computing application.
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