Characteristics of in situ deposited GaAs metal-insulator-semiconductor structures

Abstract

GaAs based metal-insulator-semiconductor structures utilizing a pseudomorphic Si interface layer were investigated. Deposition involved molecular beam epitaxy for GaAs and remote plasma enhanced chemical vapor epitaxy for Si and insulator (Si 3N 4) layers, all without exposure to air. As determined by the conductance method, interface trap densities in the upper 10 10 eV −1 cm −2 were obtained, with samples withstanding high temperature rapid thermal annealing. Frequency dispersion and hysteresis of under 100 mV indicate the quality of the interface and bulk layers. Bulk trap density in the insulator appears to be below 10 12 cm −2. Metal-insulator-semiconductor field-effect-transistors were fabricated and investigated. With GaAs channels, excess channel conduction which vanished at low temperatures was observed. Addition of as low as 5% InAs in the channel eliminated this excess channel current. A similar observation was made when a Ge interface layer was grown on GaAs prior to the Si layer. The excess current is attributed to interfacial traps below the midgap. Transconductances as high as 160 and 170 mS/mm have been obtained with about 2.5 μm gate length in GaAs and InGaAs channels, respectively.