Abstract
The characterization and modeling of the hysteresis phenomenon observed in the off-state regime of n-channel polycrystalline thin-film transistors are presented. The shift in Id–Vg characteristics between upward and downward scan were measured under various bias conditions and ambient temperatures. The localized positive charge build-up induced by band-to-band hot hole injection is responsible for the mechanism for reducing the off-leakage current, and it is recovered through the thermal emission of trapped holes, which is enhanced by self-heating of the device during the on-current conduction. On the basis of this model, the internal device characteristics related to the thermal and oxide trap properties are analyzed.
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