Abstract
CMOS devices on substrates subject to high-energy implantation of boron for buried-layer fabrication are examined. FET device characteristics, threshold voltage, and breakdown characteristics are investigated, along with mobility and minority-carrier lifetime. In addition, well leakage and breakdown are studied in an effort to provide guidelines for well design in an megaelectronvolt-implanted substrate. It is seen that MOSFET transistor characteristics are virtually unaffected by the implant. Latchup behavior improves with the incorporation of the buried layer, and the holding voltage increases as the well and implant depths decrease.< <ETX xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">></ETX>
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