Characteristic time of transition from write error to retention error in voltage-controlled magnetoresistive random-access memory

Abstract

Voltage controlled magnetoresistive random access memory (VC MRAM) is a promising candidate for a future low-power high-density memory. The main causes of bit errors in VC MRAM are write error and retention error. As the size of the memory cell decreases, the data retention time decreases, which causes a transition from the write-error-dominant region to the retention-error-dominant region at a certain operating time. Here we introduce the characteristic time of the transition from the write-error-dominant region to the retention-error-dominant region and analyze how the characteristic time depends on the effective anisotropy constant, K0. The characteristic time is approximately expressed as tc=2wτ, where w is the write error rate, and τ is the relaxation time derived by Kalmkov (2004). We show that for large K0, tc increases with increase of K0 similar to τ. The characteristic time is a key parameter for designing the VC MRAM for the variety of applications such as machine learning and artificial intelligence.