Chapter 8 - DSP Implementation Platform: TMS320C6x Architecture and Software Tools

Abstract

The choice of a digital signal processing (DSP) processor to be used in a signal processing system is generally application dependent. There are many factors that influence this choice, including cost, performance, power consumption, ease-of-use, time-to-market, and integration capabilities. This chapter focuses on TMS320C6x DSP processor, its components, architecture, and software tools. The TMS320C6x family of processors is manufactured by Texas Instruments and was primarily built to deliver speed. They are designed for million instructions per second (MIPS) intensive applications such as third generation (3G) wireless and digital imaging. Several processor versions are available for TMS320C6x family, which differ in instruction cycle time, speed, power consumption, memory, peripherals, packaging, and cost. The generic C6x architecture includes the C6x central processing unit (CPU) consisting of eight functional units divided into two sides A and B. Each side has a .M unit used for multiplication operation, a .L unit used for logical and arithmetic operations, a .S unit used for branch, bit manipulation and arithmetic operations, and a .D unit used for loading, storing, and arithmetic operations. The peripherals on a typical C6x processor include external memory interface (EMIF), direct memory access (DMA), boot loader, multi-channel buffered serial port (McBSP), host port interface (HPI), timer, and power down unit. The C64x is a recent DSP core, a part of the C6x family, with higher MIPS power and operating at higher clock rates.