Abstract
DSP (Digital Signal Processing) processors have been more and more applied in all kinds of products. Real time processing and low power is marked character for them, and the computational unit in DSP Processors performs numeric processing for DSP algorithms and is bottle-neck for improving the performance of DSP processors. In this paper, we present a path of low power and concurrency exploitation in a general 16-bit fixed programmable DSP processors working on 200 MHz, by which the computation performance is improved and the power is reduced by more than 35% based on software.
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