Abstract

Logic built-in self-test (BIST) is a design for testability (DFT) technique in whicha portion of a circuit on a chip, board, or system is used to test the digital logiccircuit itself. Logic BIST is crucial for many applications, in particular for lifecritical and mission-critical applications. These applications commonly found in the aerospace, automotive, banking, computer, healthcare, networking, and telecommunications industries require on-chip, on-board, or in-system self-test to improve the reliability of the entire system, as well as the ability to perform remote diagnosis. This chapter introduces the basic concepts and design rules of logic BIST. This chapter focuses on a number of test pattern generation and output response analysis techniques suitable for BIST implementations. Moreover, various BIST timing control diagrams are shown to illustrate how to test faults in a scan-based design containing multiple clock domains. Finally, the chapter demonstrates the process to design a logic BIST system comprised of a test pattern generator, output response analyzer, and logic BIST controller.

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