Chapter 3 - Alternate device architectures to mitigate challenges

Abstract

This chapter focuses mainly on the alternate device architectures to mitigate short channel effects (SCEs) in nanoscale MOSFETs. To solve this problem, various techniques and methods, such as silicon-on-insulator (SOI) and silicon-on-nothing (SON) concepts, nonuniform doping, pocket/halo doping, reverse SCEs (RSCEs), gate material engineering (dual material gate and tri material gate), high-k material to reduce gate tunneling, underlap, and spacer engineering are applied to the conventional MOSFET structure. SOI and SON are studied and discussed for their ability to suppress the SCEs. Gate material engineering is another way to suppress the SCEs and increases the transport carrier efficiency. Underlap MOS structures are more suitable in controlling SCEs and reducing leakage problems. Nonuniform doping, pocket/halo doping, and RSCEs are the important techniques that help overcome SCEs in the MOSFET without degrading any performance parameters.