Abstract

Capture designs can either be flat, in which signals are connected across pages in the design, or hierarchical, in which the design is partitioned into blocks and signals transverse up and down the hierarchy. Flat designs are represented in the Project Manager as having a single schematic folder with a number of associated pages, whereas hierarchical designs will have more than one schematic folder. Each schematic folder in the hierarchy will be represented by a hierarchical block in a schematic. Different hierarchical ports are available, which represent the type of port and direction of data flow. Hierarchical blocks are normally used for top-down designs, where the block is drawn on the top-level schematic and associated signal pins are added. The hierarchical blocks cannot be saved to a library as they are drawn “on the fly” and saved within the schematic file. Hierarchical symbols are normally used for bottom-up designs, where the schematic is drawn first and ports are added to the input and output signals. A symbol is then created with the same number of signal pins and associated names. These hierarchical symbols can be saved to a library for use in other designs. Parameters can be passed between levels of hierarchy using the Sub-PARAM part from the Special library. This allows different parameters to be passed to hierarchical blocks or symbols. PSpice can generate a hierarchical netlist such that instantiated subcircuit definitions will only appear once in the netlist.

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