An Innovative I/O Budgeting Methodology for Hierarchical SoC Development

Abstract

This paper introduces a new input/output (I/O) budgeting methodology enabling delayed exchange of updated hierarchical blocks at System-on-Chip (SoC) level without risking the timing and tapeout schedule. We propose a “freeze_interface” concept to re-define the timing constraints for each I/O path of a hierarchical block in a more precise and fine-grain way so that block and SoC level development can be completely independent. The timing budgeting methodology has been formulated and demonstrated by experimental results.