Chapter 2 - Background Material

Abstract

This chapter describes cache. A cache is a small, hopefully fast, memory that at any one time can hold the contents of a fraction of the overall memory of the machine. Its organization is specified by its size, number of sets, associativity, block size, sub-block size, fetch strategy, and write strategy. The total size is given as the product of the other three primary organizational parameters: degree of associativity, number of sets, and block size. Any layer in a hierarchy of caches can contain either one unified cache for both instructions and data or two separate caches, one specifically for each reference stream. These two alternatives are referred to as the basic organizations. The cache closest to the CPU is denoted L1. If the cache level is split, the instruction and data caches are individually referred to as L1I and L1D. The first-level cache is also commonly known as the primary cache. In a multi-level cache hierarchy, the one beyond L1 from the CPU is called L2. Cache at an arbitrary level in the hierarchy is denoted L1. The second-level cache is also frequently called the secondary cache. The terms multi-level cache and memory hierarchy are almost synonymous. The only difference is whether or the main memory is counted as a layer. If there is a single level of caching, the memory hierarchy has two levels, but the cache hierarchy has only one level and so the term multi-level cache hierarchy is not applicable.