Abstract
This chapter discusses various aspects of the debug features supported by the Cortex-M0 processor. The Cortex-M0 processor supports a number of useful debug features which include halting, resuming, and single stepping of program execution and access to processor core registers and special registers. These debug features are vital for software development and can be used for other tasks like flash programming and product testing. The debug features of the Cortex-M0 processor are based on the ARM CoreSight debug architecture. It is found that the debug interface allows the flash memory to be reprogrammed easily without the need to remove it from the circuit board. A separated debug interface block is used to convert a debug interface protocol to the parallel bus interface. It is found that by separating the debug interface from the main processor logic, the choice of debug interface protocol becomes much more flexible, without affecting the underlying debug features on the main processor logic.
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