Abstract
The rapid growth in the number of battery-operated devices has brought low-power design to the forefront of embedded systems development. The MSP430 is among the leading controllers in this regard, with typical room temperature consumption in the neighborhood of 1 mW/MIPS or less. The '430 series devices have the option of shutting off the processor portion of the device, by using the CPUOff bit in the Status Register. The processor is then awakened by an interrupt. Further functionality in the CPU portion can be turned on and off via the SCG1, SCG0, and OscOff bits, which also reside in the SR. TI has, in the literature, defined five low-power modes. The most common use of the low-power modes is for periodic processing based on a timer interrupt. The main loop is written so that startup housekeeping is performed, then the selected low-power mode (LPM) is entered. Processing is then performed within the ISR. At the end of the ISR, the reti instruction restores the processor to the LPM.
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