Channel Design Optimization for 1.2-kV 4H-SiC MOSFET Achieving Inherent Unipolar Diode 3rd Quadrant Operation

Abstract

1.2 kV 4H-SiC MOSFETs operating with a low knee voltage and forward voltage drop under third quadrant mode are proposed and experimentally demonstrated by using optimized accumulation mode channels to eliminate external SiC SBDs in power converter applications. By removing epitaxial regrowth process step, the overall fabrication process for the proposed MOSFET is more concise and manageable. Channel design parameters, such as channel doping concentration, channel length, and different gate oxides were investigated to achieve low knee voltage and forward voltage drop under third quadrant operation mode ensuring high breakdown voltages. To understand the impact of channel potential (barrier) on the current conduction behavior as well as leakage current during the blocking mode, 2D simulations were conducted. In addition, the reverse recovery characteristics and switching characteristics are discussed. Based on the optimized channel design, the promising devices for high density power electronics are proposed.