Abstract

A super-junction (SJ) device has been developed to improve the trade-off relationship between the breakdown voltage ( $V_{\text{BD}}$ ) and specific on-resistance ( $\boldsymbol{R}_{\mathbf{onA}}$ ). A multi-epitaxial (ME) growth method had been used for fundamental demonstrations, but this method needs a lot of repetitions of epitaxial growth and implantation in the case of SiC material. A trench-filling epitaxial (TFE) growth method is expected as a promising alternative, especially for high-voltage devices. In this study, we have established critical fabrication processes for a thick ( $> 20 \boldsymbol{\mu} \mathbf{m}$ ) and high-aspect-ratio SJ structure. The measured $\boldsymbol{R}_{\mathbf{onA}}$ of a 7.8 kV SJ MOSFET was $17.8 \mathbf{m}\mathbf{\Omega}\cdot \mathbf{cm}^{2}$ , which is less than half the $\boldsymbol{R}_{\mathbf{onA}}$ of the state-of-the-art 6.5 kV-class SiC MOSFET with an n-type drift layer. Improvement of trade-off relationship exceeding the 4H-SiC theoretical limit was experimentally demonstrated for the first time.

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