Unfamiliar pillars

Abstract

Researchers from Sichuan University, China, propose a new superjunction (SJ) structure designed to reduce the power loss of insulated-gate bipolar transistors (IGBTs). The new ‘carrier-storage-enhanced SJ IGBT’ has a 23% lower on-state voltage drop compared to a n-Si/p-Si SJ IGBT. IGBTs are important parts of power semiconductor devices, which themselves are core components of power electronic circuits. IGBTs provide fast and efficient switching and consist of four alternating layers, controlled by a metal-oxide-semiconductor (MOS) gate structure. The efficiency of power electronic systems is linked to 3 factors: fast switching, high breakdown voltage (VB) and the difference between the turn-off loss (Eoff) and the on-state voltage drop (VCE(sat)) of the power semiconductor device. Huang (centre) and colleagues in their lab space at Sichuan University. Schematic diagram of energy band and carriers transport in the proposed SJ IGBT. Tradeoffs for VB-VCE(sat) (a) and Eoff-VCE(sat) (b). IGBTs with SJ structures incorporate pillars of n- and p-type semiconductor material (known as ‘doped’ material). This allows the IGBT to be turned off quickly, which can increase the difference between Eoff and VCE(sat), thus improving the device efficiency. However, as the adage goes, “with great doping comes great charge imbalance”. VB is sensitive to charge imbalance and thus the improvement in efficiency gained from the incorporated pillars is curtailed somewhat by the breakdown voltage's sensitivity. Recent work by Huang and colleagues led to the development of a so-called ‘carrier-storage-enhanced (CSE) SJ’ in which the p-pillar is connected indirectly to the emitter contact in the SJ structure. This effectively lowers the VCE(sat) and also reduces the amount of doping required in the n- and p-pillars, leading to an excellent Eoff-VCE(sat) tradeoff. The VB is still sensitive to the charge imbalance, and that is where the research group turned their attention next. By changing the chemical makeup of the SJ structure, using n-Si and p-3C-SiC pillars instead of n-Si and p-Si pillars, Huang's group found that the charge-imbalance sensitivity of VB was reduced. In addition, the new SJ structure was found to reduce the amount of reverse-recovery behaviour, which is undesirable in these devices. Coupling of the CSE-SJ and an IGBT gives rise to the (somewhat verbose) CSE-SJ-IGBT, the simulation results of which are presented in this issue of Electronics Letters. The simulation results for this device are promising. VCE(sat) is around 20% lower whilst maintaining the same V­B and Eoff. This improvement has been attributed to the CSE-SJ. The n-Si/p-3C-SiC heterojunction forms a high hole barrier, which prevents hole collection by the p-3C-SiC pillar. Huang is keen to produce the device to see how experimental results stack up against the simulated ones presented. A successfully fabricated CSE-SJ-IGBT that produces the same results as the simulation has the potential to be highly useful in medium- and high-power applications. IGBT devices have dominated medium-power applications for some time. Recently, however, the rise of SiC metal-oxide semiconductor field-effect transistors (MOSFETs) have begun eating into the market of IGBT devices. Companies are exploring the potential of IGBT devices and the work presented here could one day be an important piece in the jigsaw of the future. Huang believes that SiC IGBT devices could be very promising in high-power applications, once the manufacturing process matures. It will be interesting to see what experimental studies of the device presented in Huang's submission discover and how it could potentially affect the future of power semiconductor devices.