Bipolar snapback in junctionless transistors for capacitorless dynamic random access memory

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In this work, we analyze the snapback effect and extract the effective bipolar current gain in junctionless nanotransistors. The optimal electron and hole concentrations required to trigger and sustain bipolar snapback in junctionless transistors have been evaluated. The occurrence of snapback at lower drain bias (≅ 2 V) in junctionless devices in comparison to conventional inversion mode transistors demonstrates the enormous potential for static power reduction in capacitorless dynamic random access memories. High values (40–70) of effective bipolar current gain achieved in optimally designed junctionless transistors can be utilized to improve the sensing margin for dynamic memories.