1-T Capacitorless DRAM Using Bandgap-Engineered Silicon-Germanium Bipolar I-MOS

Abstract

In this paper, a 1-Transitor (1-T) capacitorless dynamic random access memory (DRAM) using bandgap-engineered silicon-germanium Bipolar ionization metal oxide semiconductor field effect transistor (I-MOS) is investigated through numerical simulations. We have demonstrated the application of the proposed Si0.6Ge0.4 Bipolar I-MOS for realization of a 1-T capacitorless DRAM. The proposed device can achieve hysteresis at significantly lower drain voltages ( $V_{\mathrm{LD}} =0.45$ V to $V_{\mathrm{LU}} =1.15$ V), in comparison to the inversion mode device ( $V_{\mathrm{LD}} = 8$ V to $V_{\mathrm{LU}} =11$ V). In addition, the proposed 1-T capacitorless DRAM exhibits a wider hysteresis window ( $\Delta \text{V}$ ) of the order ~700 mV and a sensing margin ( $\Delta \text{I}$ ) of ~5 orders in comparison to the inversion mode based 1-T capacitorless DRAM. Moreover, the proposed 1-T capacitorless DRAM exhibits the retention time of ~750 msec and ~320 msec for T = 25 °C and T = 85 °C, respectively. The proposed 1-T capacitorless DRAM also shows nondestructive read and an extreme long-term endurance. Therefore, the results presented in this paper can provide an opportunity for future DRAM design in deep nanometer technology.