High Density Capacitorless Dynamic Random Access Memory Cell with Quasi Silicon-on-Insulator Structure Based on Bulk Substrate

Abstract

A novel quasi silicon-on-insulator (QSOI) capacitorless dynamic random access memory (DRAM) Cell with bulk substrate is proposed and investigated for the first time. The QSOI DRAM cell is based on the promising highly scalable QSOI device structure. The deep L-shape layer of proposed QSOI cell can provide isolation between adjacent cells along bit line, without increasing the cell area as the one transistor (1T) bulk capacitorless DRAM cell. The electrical performance of this structure is also studied and compared with 1T-bulk cell. Longer retention time and larger sensing margin can be achieved in the proposed QSOI cell, due to the suppressed leakage current. The results indicate that QSOI cell has great potentials for high density DRAM applications.