Bias-induced junction displacements in scanning spreading resistance microscopy and scanning capacitance microscopy

Abstract

Scanning capacitance microscopy (SCM) and scanning spreading resistance microscopy (SSRM) are both valuable tools for analyzing the two-dimensional carrier distribution in semiconductor devices. Both tools rely on the application of a bias between tip and sample to probe the relevant property (capacitance or resistance). With respect to SCM, experimental and theoretical evidence has been presented by several authors that the bias leads to a displacement of the mobile carriers and thus creates an ambiguity in the exact junction location among other carriers, leading to the concept of scanning capacitance spectroscopy. For SSRM, which originally employed a very small bias (50–100 mV), no displacement could be observed. With the advent of scanning spreading resistance spectroscopy and diamond-coated tips, higher bias voltages (up to 3–500 mV) are sometimes applied and questions are raised regarding possible distortions being induced in SSRM as well. In this article, detailed studies on the bias-induced junction displacement in SCM and SSRM are described. On cross sections, a larger junction shift is seen for SCM than for SSRM. On bevel sections both techniques show only a rather small displacement. For SSRM, a clear difference could be observed between p-type implants where almost no displacement is observed compared to n-type implants where a small displacement of the junction peak toward the surface is observed for large positive bias (relative to the back contact). A flattening of the SSRM junction peak for large bias voltages (mainly for positive voltages) was also observed. Finally, theoretical understanding of these observations for SSRM obtained through extensive device simulations and the qualitative simulation of the SSRM profiles are presented.