Abstract
Onboard computing demands for space missions are continually increasing due to the need for real-time sensor and autonomous processing combined with limited communication bandwidth to ground stations. However, creating space-grade processors that can operate reliably over an extended period of time in environments that are highly susceptible to radiation hazards is a lengthy, complex, and costly process, resulting in limited processor options for space missions. Therefore, research is conducted into current and upcoming space-grade processors to provide critical insights for progressively more advanced architectures that can better meet the increasing demands for onboard computing. First, a taxonomy is formulated to broadly characterize the space-computing domain and identify computations for benchmark development, optimization, and testing. Then, benchmarking data are generated for top-performing central processing units and field-programmable gate arrays to experimentally measure and compare their realizable capabilities. The results demonstrate how to optimize for their respective architectures, and how they compare to one another for a variety of integer and floating-point computations in terms of performance and power efficiency. Tradeoffs between architectures are determined and can be considered when deciding which space-grade processors are best suited for specific space missions, or which characteristics and features are most desirable for future space-grade processors.
Accepted Version
Published Version
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