Abstract
In this paper, the design and measurement results of a CMOS partially depleted silicon-on-insulator (SOI) traveling-wave amplifier (TWA) are presented. The four-stage TWA is designed with a single common source nMOSFET in each stage using a 130-nm SOI CMOS technology requiring a chip area of 0.75 mm/sup 2/. A gain of 4.5 dB and a unity-gain bandwidth of 30 GHz are measured at 1.4-V supply voltage for a power consumption of 66 mW. The designed circuit has been characterized over a temperature range from 25 /spl deg/C to 300 /spl deg/C. The performance degradation on the gain of the TWA, the SOI transistors, as well as the microstrip lines used for the matching network are analyzed. Thanks to the introduction of a dynamic threshold-voltage MOSFET, a greater gain-bandwidth product under lower bias conditions is demonstrated.
Sign-in/Register to access full text options 
Talk to us
Join us for a 30 min session where you can share your feedback and ask us any queries you have
Schedule a call
