Back-gate effects on DC performance and carrier transport in 22 nm FDSOI technology down to cryogenic temperatures

Abstract

This paper presents an in-depth DC characterization of a 22 nm FDSOI CMOS technology down to deep cryogenic temperature, i.e., 2.95 K. The impact of the back-gate voltage (Vback) on device performance, i.e., threshold voltage (VT) and carrier transport, is investigated over a wide temperature range. Moreover, semiclassical and quantum transports of two-dimensional carrier gas are investigated. The effective mobility (μeff) extracted from short devices at cryogenic temperatures is lower than actual mobility due to the presence of ballistic transport. The discontinuous ID–VG is found in both long and extremely short transistors, which is ascribed to the intersubband transition happening during the scattering event. Oscillatory ID–VG due to resonant tunneling manifests itself in short devices at cryogenic temperatures and depends on Vback. On the other hand, the worse subthreshold swing is found for short devices in the saturation regime and at cryogenic temperatures due to source-to-drain tunneling.