Avalanche injection into the oxide in silicon gate-controlled devices—I theory

Abstract

The avalanche injection into the oxide region of silicon gate-controlled devices is analysed in some detail, in terms of the physical theory of hot electrons in silicon as developed by Bartelink, Moll and Meyer. Numerically computed universal plots are given for the calculation of the hot-carrier injection ratio (avalanche-induced gate current over junction current) at given maximum interface electric field at breakdown. Features such as barrier reflexion due to transverse momentum of electrons, non-normal orientation of the electric field and Schottky barrier lowering have been incorporated in the analysis. Values of the hot-carrier injection ratio in positive-gate biased p +− n diodes (electron injection) calculated in this theory range between 4·3 × 10 −4 and 4·7 × 10 −3 for maximum interface electric fields at breakdown between 1·0 × 10 6 V/cm and 1·4 × 10 6 V/cm, if the fitting parameters of the above quoted physical theory are used.