Assessing the manufacturing tolerances and uniformity of CMOS compatible metamaterial fabrication

Abstract

The manufacturing tolerances of a stencil-lithography variant, membrane projection lithography, were investigated. In the first part of this work, electron beam lithography was used to create stencils with a range of linewidths. These patterns were transferred into the stencil membrane and used to pattern metallic lines on vertical silicon faces. Only the largest lines, with a nominal width of 84 nm, were resolved, resulting in 45 ± 10 nm (average ± standard deviation) as deposited with 135-nm spacing. Although written in the e-beam write software file as 84-nm in width, the lines exhibited linewidth bias. This can largely be attributed to nonvertical sidewalls inherent to dry etching techniques that cause proportionally larger impact with decreasing feature size. The line edge roughness can be significantly attributed to the grain structure of the aluminum nitride stencil membrane. In the second part of this work, the spatial uniformity of optically defined (as opposed to e-beam written) metamaterial structures over large areas was assessed. A Fourier transform infrared spectrometer microscope was used to collect the reflection spectra of samples with optically defined vertical split ring from 25 spatially resolved 300 × 300 μm regions in a 1-cm2 area. The technique is shown to provide a qualitative measure of the uniformity of the inclusions.