Abstract
The chapter discusses the ASIC synthesis and frequently used Synopsys DC commands and their role during ASIC synthesis. Even the chapter discusses about the design partitioning, synthesis guidelines, and design constraints. The DC commands used during the synthesis and their role are described for better understanding of synthesis scripts or to create synthesis scripts for the required constratints. The chapter is useful to understand the area, speed constraints, and logic synthesis using Synopsys DC.
Talk to us
Join us for a 30 min session where you can share your feedback and ask us any queries you have
Schedule a callDisclaimer: All third-party content on this website/platform is and will remain the property of their respective owners and is provided on "as is" basis without any warranties, express or implied. Use of third-party content does not indicate any affiliation, sponsorship with or endorsement by them. Any references to third-party content is to identify the corresponding services and shall be considered fair use under The CopyrightLaw.
