Application Specific Instruction Set Processors: redefining hardware-software boundary

Abstract

Logic functions have many different architectural alternatives for their implementations. These range from dedicated combinational and sequential architectures to different types of programmable CPU architectures. Each architectural alternative presents a unique set of advantages and limitations. The choice of an architecture is decided based on how well the speed-power-cost and design time trade-offs that the architectures offers matches the design's requirement. While both the dedicated hardware architectures and the software architectures (programmable CPU based) have a long history of research and exploration, it is comparatively more recently that one has started seeing the trend of leveraging the best features of both these kinds of architectures via designing new programmable architectures, namely the Application Specific Instruction Set Processor (ASIP) architectures. The idea of present paper is to discuss the comparative benefits and limitations of both the dedicated hardware architectures and the software based general purpose architectures and identify how the benefit of these architectures can be realized through a single architecture-the ASIP architecture.