Application of synchrotron x-ray lithography to fabricate fully scaled 0.5 μm complementary metal–oxide semiconductor devices and circuits

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High performance fully scaled 0.5 μm complementary metal–oxide semiconductors very large scale integrated (CMOS VLSI) circuits have been fabricated using synchrotron x-ray lithography technology. X-ray lithography is employed at all levels to attain a minimum feature size of 0.5 μm. The wafer exposures are done at the VUV storage ring from the National Synchrotron Light Source, Brookhaven National Laboratory. A stepper built at IBM Yorktown Heights is used at the beamline to perform the wafer exposures. All the lithography levels are aligned to the prefabricated 0.5 μm deep silicon trench zero level with an overlay less than 0.1 μm (1σ) between levels. Single level resists (both positive and negative) are used throughout the entire CMOS process. Linewidth control better than 0.01 μm and alignment tolerance less than 0.10 μm are accomplished. The patterning of this x-ray lithography mask is accomplished through a vector scan electron beam direct writing system. Masks made of boron doped silicon membranes with electroplated gold are used as the absorber. An average linewidth variation less than 0.2 μm can be attained for the (25 mm)2 field size masks. A retrograded N well 0.5 μm CMOS process is used to exercise the fabrication of x-ray lithography VLSIs. In the (25 mm)2 testsite, CMOS devices, ring oscillators and fully scaled 0.5 μm CMOS SRAM (static random access memory) are densely populated to exercise this technology. In this experiment CMOS devices and ring oscillators are successfully fabricated. The device characteristics are essentially the same as those fabricated using other lithography methods. A fully scaled 0.5 μm 61 stage inverter ring oscillator was measured at a delay of 95 ps/stage when operating at a 3.5 volts power supply. Radiation effects on the fabricated CMOS devices are studied. With the final 400 °C hydrogen ambient annealing, there is no apparent difference on the device characteristics in comparison to the same devices fabricated using optical lithography.