Abstract

The application of plasma doping in three-dimensional (3-D) metal oxide semiconductor (MOS) transistors is proposed. One of the key steps in for fabricating 3-D MOS transistors with high-aspect-ratio channels is 3-D doping. Thus, plasma doping is analyzed and its profile is evaluated. Since conventional evaluation methods are not very effective for impurity concentration profiling along the sidewall of a vertical structure, a new method utilizing impurity-enhanced oxidation is proposed. By this method, an arsenic-doped layer of approximately 1×1020 cm-3 in concentration has been formed uniformly for a beam of 1 µm height and 0.2-1 µm width.

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