Abstract
An analytical model for Junctionless Accumulation Mode Surrounding Gate (JLAMSG) MOSFET is developed using superposition technique. The model incorporates source/drain and channel depletion for an accurate analysis. The device parameter dependent electrostatic center potential, drain current (IDS) and subthreshold slope (SS) have been evaluated. The numerical simulation results using ATLAS-3D device simulator are in good agreement with the results obtained from the developed analytical model. A comparative assessment between Junctionless (JL) and Junctionless Accumulation Mode (JLAM) Surrounding Gate (SG) devices for analog/RF performance is also carried out. The superiority of JLAMSG MOSFET over Junctionless Surrounding Gate (JLSG) is discussed for Analog and RF application.
Published Version
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