Abstract

When the measurements of CMOS transistors strike nm extends, the energy consumed by the device increments because of high off state current (I off ). To diminish I off , the Subthreshold Swing (SS) of the device must be decreased. To decrease SS, numerous bearer pumping systems have been recommended. one of the promising less power consumed device is Tunnel Field Effect Transistor (TFET). But in TFET, the on-current (Ion) is extensively low. To expand Ion, numerous Gate Engineering configurations have been recommended. In this paper, an analytical model of Dual Material Double Gate All Around Tunnel Field Effect Transistor (DMDGAA-TFET) is presented. Surface potential and electric flux are analytically modelded by fulfilling 2-D Laplace condition. Here electric flux is utilized to decide the drain current. At last the Ion improvement as well as, the reduced SS is contrasted with Dual Material Gate Tunnel Field Effect Transistor (DMG-TFET) by checking the analytical results with MATLAB results.

Full Text
Paper version not known

Talk to us

Join us for a 30 min session where you can share your feedback and ask us any queries you have

Schedule a call

Disclaimer: All third-party content on this website/platform is and will remain the property of their respective owners and is provided on "as is" basis without any warranties, express or implied. Use of third-party content does not indicate any affiliation, sponsorship with or endorsement by them. Any references to third-party content is to identify the corresponding services and shall be considered fair use under The CopyrightLaw.