Analysis of Three-Dimensional Magnetic Domain Wall Racetrack Memory

Abstract

An overview of magnetic racetrack operation and components necessary to successfully realize this memory technology is presented. Fundamental physical concepts of adiabatic and non-adiabatic spin-torque transfer is presented and used to explain how bits of information are read, written, and pushed through ferromagnetic racetracks. Recent developments in the controlled movement of domain walls in magnetic nanowires by short pulses of spinpolarized current give promise of a nonvolatile memory device with the high performance and reliability of conventional solid-state memory but at the low cost of conventional magnetic disk drive storage. Resonant amplification of spin-torque transfer via pulsed current operation has been proposed to overcome issues with current density. The racetrack memory comprises an array of magnetic nanowires arranged horizontally or vertically on a silicon chip. Individual spintronics reading and writing nanodevices are used to modify or read a train of ~10 to 100 domain walls, which store a series of data bits in each nanowire. This racetrack memory is an example of the move toward innately three-dimensional microelectronic devices.