A Novel Methodology to Debug Leakage Power Issues in Silicon- A Mobile SoC Ramp Production Case Study

Abstract

As the world is moving toward DSM era, understanding silicon behavior is becoming more and more challenging. Models are getting complex and yet not able to reflect the actual silicon behavior. Hence some of the silicon issues cannot be replicated in circuit simulations. The problems found on silicon require the understanding of various tools and techniques available to observe and modify the die. A good understanding of these techniques and debug methodology is required to meet Time to Market goals. The devices used for mobile applications have stringent power requirements. The devices thus have power conservation modes during which the current drawn is extremely low of the order of tens of microamperes. This paper discusses the challenges and techniques used to identify the issues found in shutdown mode (a power conservation mode), which had to be addressed in order to ramp the device to production.