Abstract
We report a detailed analysis of neutron-induced multibit-upset (MBU) clusters measured from flip-flop arrays implemented in a 14-nm trigate CMOS. Depending on the strike location, charge collection efficiency, and circuit topology, the MBU clusters are characterized in terms of size and span, and a qualitative first-order analysis has been presented. A novel MBU analysis framework has been demonstrated that uses a weighted sliding window to characterize MBU clusters efficiently and accurately with minimal double-counting or mischaracterization of cluster size. To further explain the relative MBU cross sections, the unique MBU patterns extracted from measured data have been studied and analyzed to find layout dependencies. The results show the strong correlation between the internode proximity and MBUs. The analysis shows a higher soft error rate (SER) cross section for smaller MBU cluster size and smaller span while the bigger clusters have lower contribution toward overall MBU SER.
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