Analysis of hot carrier-induced degradation of Horizontal Current Bipolar Transistor (HCBT)

Abstract

The relative contribution of the hot electrons and hot holes to the reliability degradation of the Horizontal Current Bipolar Transistor (HCBT) is investigated by TCAD simulations. The base current (IB) degradation, obtained by the reverse-bias emitter-base (EB) and mixed-mode stress measurements, is caused by a hot carrier-induced interface trap generation at silicon-oxide interfaces above and below HCBT's emitter n+ polysilicon region. The simulation analysis is performed on the HCBT structures with different n-collector doping profiles and n-hill silicon sidewall surface treatment. The used lucky electron injection model distinguishes the hot carrier type responsible for the damage and makes it possible to predict the HCBT reliability behavior. It is shown that the majority of traps under the reverse-bias EB stress is located at the top interface and is caused by the hot holes, whereas the hot electrons produce the traps under the mixed-mode stress, located mostly at the bottom interface.