Analysis and design of low-power reversible BILBO

Abstract

Built in Logic Block Observer (BILBO) is a bank of flip-flops which are used for self-testing for complex digital IC's in pipeline approach. As per the Launder's principle, KTln2 heat is dissipated if there is any loss in bit. Since BILBO is designed with irreversible logic gates we observe large amount of leakage power which affects its performance. So by keeping this as main criteria, our paper enumerates the process of designing 90nm low power BILBO using reversible logic for three bits, which plays vital role for reducing power by recovering the bits which are lost. In this paper there is a detailed theoretical analysis and a mathematical approach of calculating quantum cost, garbage outputs, power and delay. Finally simulation results are obtained by using cadence virtuoso tool and power dissipated is 3.29mw in our proposed circuit which it implies power is optimized. In this paper detailed simulation waves, power graphs are submitted.