An improved transistor noise equivalent circuit model for silicon‐on‐insulator transistors considering the frequency dispersion effect

Abstract

AbstractIn this paper, an improved transistor equivalent circuit noise model is proposed. This model takes the frequency dispersion effects into account and modified the induced gate current source (Ig) equation based on the classical Van der Ziel noise model. First, the conductance at Vd = 0 V (gd0) is derived from DC bias condition, and the accuracy of channel thermal noise (Id) is verified. Then, by analyzing the physical structure of the silicon‐on‐insulator (SOI) transistor, an equivalent lumped‐parameter circuit model is established. The element initial values are extracted based on the measured S‐parameters. Then, the parameters in the Ig equation are obtained through noise circle simulation in comparison with measurement data. In contrast to existing models, the frequency dispersion effect is analyzed and modeled using a three‐order polynomial. The results show that with respect to the traditional noise model, the noise circle's root‐mean‐square error of this work is decreased from 23.16 to 1.55.