An extension of the lumped-network FDTD method to linear two-port lumped circuits

Abstract

The lumped-network finite-difference time-domain (LN-FDTD) technique is an extension of the conventional finite-difference time-domain (FDTD) method that allows the systematic incorporation of linear one-port lumped networks (LNs) into a single FDTD cell. This paper presents an extension of the LN-FDTD technique, which allows linear two-port (TP)-LNs to be incorporated into the FDTD framework. The method basically consists of describing a TP-LN by means of its admittance matrix in the Laplace domain. By applying the Mobius transformation technique, we then obtain the admittance matrix of the TP-LN in the Z-transform domain. Finally, appropriate digital signal-processing methodologies are used to derive a set of difference equations that models the TP-LN behavior in the discrete-time domain. These equations are solved in combination with the Maxwell-Ampere's equation. To show the validity of the TP-LN-FDTD technique introduced here, we have considered the equivalent circuit of a chip capacitor and a linear circuit model of a generic metal-semiconductor field-effect transistor. These LNs have been placed on a microstrip gap and the scattering parameters of the resulting hybrid circuit have been computed. The results are compared with those obtained by using the electromagnetic simulator Agilent HFSS in combination with the circuital simulator ADS, and with those calculated by ADS alone. For the chip capacitor, experimental measurements have also been carried out. The agreement among all the simulated results is good. Generally speaking, the measured results agree with the simulated ones. The differences observed are mainly due to the influence of the subminiature A connectors and some mismatching at the ports.