An evaluation method of the profile of plasma-induced defects based on capacitance–voltage measurement

Abstract

Aggressive shrinkage and geometrical transition to three-dimensional structures in metal–oxide–semiconductor field-effect transistors (MOSFETs) lead to potentially serious problems regarding plasma processing such as plasma-induced physical damage (PPD). For the precise control of material processing and future device designs, it is extremely important to clarify the depth and energy profiles of PPD. Conventional methods to estimate the PPD profile (e.g., wet etching) are time-consuming. In this study, we propose an advanced method using a simple capacitance–voltage (C–V) measurement. The method first assumes the depth and energy profiles of defects in Si substrates, and then optimizes the C–V curves. We applied this methodology to evaluate the defect generation in (100), (111), and (110) Si substrates. No orientation dependence was found regarding the surface-oxide layers, whereas a large number of defects was assigned in the case of (110). The damaged layer thickness and areal density were estimated. This method provides the highly sensitive PPD prediction indispensable for designing future low-damage plasma processes.